Regviz

Silicon Labs /EFR32ZG23B011F512IM40 /SYSCFG_S /DMEM0RETNCTRL

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as DMEM0RETNCTRL

Share

Cut and paste this URL to share the unmodified register and value:

https://regviz.com/r/Silicon Labs/EFR32FG23B010F512IM40/SYSCFG_NS/DMEM0RETNCTRL#0x0

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 (ALLON)RAMRETNCTRL

RAMRETNCTRL=ALLON

Description

Configure to provide general RAM retention configuration.

Fields

RAMRETNCTRL

DMEM0 blockset retention control

0 (ALLON): None of the RAM blocks powered down

4 (BLK3): Power down RAM block 3 (address range 0x2000C000-0x20010000)

6 (BLK2TO3): Power down RAM blocks 3 and above (address range 0x20008000-0x20010000)

7 (BLK1TO3): Power down RAM blocks 1 and above (address range 0x20004000-0x20010000)

Links

()

Register Reference

https://github.com/cmsis-svd/cmsis-svd-data